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Espressif Systems /ESP32-S3 /SPI0 /SPI_SMEM_DIN_NUM

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Interpret as SPI_SMEM_DIN_NUM

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SPI_SMEM_DIN0_NUM 0SPI_SMEM_DIN1_NUM 0SPI_SMEM_DIN2_NUM 0SPI_SMEM_DIN3_NUM 0SPI_SMEM_DIN4_NUM 0SPI_SMEM_DIN5_NUM 0SPI_SMEM_DIN6_NUM 0SPI_SMEM_DIN7_NUM 0SPI_SMEM_DINS_NUM

Description

MSPI input timing delay number control register when accesses to Ext_RAM.

Fields

SPI_SMEM_DIN0_NUM

SPI_D input delay number.
SPI_SMEM_DIN1_NUM

SPI_Q input delay number.
SPI_SMEM_DIN2_NUM

SPI_WP input delay number.
SPI_SMEM_DIN3_NUM

SPI_HD input delay number.
SPI_SMEM_DIN4_NUM

SPI_IO4 input delay number.
SPI_SMEM_DIN5_NUM

SPI_IO5 input delay number.
SPI_SMEM_DIN6_NUM

SPI_IO6 input delay number.
SPI_SMEM_DIN7_NUM

SPI_IO7 input delay number.
SPI_SMEM_DINS_NUM

SPI_DQS input delay number.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data